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Science & Technology 🏢 Full Time ⭐️ Terverifikasi

Senior/Lead Research Engineer (FOWLP/2.5D/3D Package Integration) - IME

Agency for Science, Technology and Research
Singapore
Estimasi Gaji
SGD 90.000 – SGD 150.000
Live Update
24 Juni 2026
Batas Akhir
24 Jun 2027

Deskripsi Pekerjaan

Join the cutting-edge research frontier at A*STAR's Institute of Microelectronics (IME), where innovation meets impact. We're seeking a visionary Senior/Lead Research Engineer to spearhead groundbreaking projects in advanced semiconductor packaging, specifically focusing on Fan-Out Wafer Level Packaging (FOWLP), 2.5D, and 3D integration technologies. This role offers an unparalleled opportunity to shape the future of microelectronics by developing next-generation packaging solutions that enable higher performance, miniaturization, and reliability in devices powering 5G, AI, and IoT applications.

As part of our multidisciplinary research ecosystem, you'll collaborate with world-class scientists and engineers across A*STAR's network. Your work will contribute to high-impact publications, patents, and industry partnerships that translate research into real-world solutions. IME provides state-of-the-art facilities and a dynamic environment where your expertise can drive technological breakthroughs. If you're passionate about pushing semiconductor boundaries and want your innovations to influence global electronics manufacturing, this is your chance to make history.

Tanggung Jawab

  • Lead R&D initiatives in FOWLP, 2.5D, and 3D package integration architectures
  • Design and optimize advanced packaging processes for performance and yield
  • Develop novel materials and methodologies for heterogeneous integration
  • Collaborate with cross-functional teams on system-level integration challenges
  • Author high-impact publications and patents in semiconductor packaging
  • Mentor junior researchers and drive innovation in packaging technologies
  • Engage with industry partners to translate research into commercial solutions

Kualifikasi

  • PhD or Master's degree in Electrical Engineering, Materials Science, or related field
  • 5+ years of hands-on experience in semiconductor packaging R&D
  • Expertise in FOWLP, 2.5D/3D integration, and heterogeneous packaging
  • Strong background in semiconductor device physics and process integration
  • Proven track record of publications and patents in packaging technologies
  • Experience with characterization tools (SEM, TEM, X-ray, etc.)
  • Excellent problem-solving skills in multi-disciplinary environments

Keahlian yang Dibutuhkan

Advanced Packaging FOWLP 2.5D/3D Integration Semiconductor Packaging Process Integration Materials Science Device Physics Heterogeneous Integration

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