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Engineering 🏢 Full Time ⭐️ Terverifikasi

IC Design Engineer (Junior / Senior / Staff Level)

Talent Trader Group
Central Region
Estimasi Gaji
SGD 15.000 – SGD 20.000
Live Update
16 Juni 2026
Batas Akhir
16 Jun 2027

Deskripsi Pekerjaan

Are you a visionary in semiconductor technology looking to make a significant impact? Talent Trader Group is seeking highly skilled and motivated IC Engineers at Junior, Senior, and Staff levels to join a world-class engineering team in Singapore’s vibrant Central Region. This is a rare opportunity to work on cutting-edge Integrated Circuit (IC) designs that power the next generation of global electronics.

As part of this high-performance team, you will be involved in the full lifecycle of ASIC and SoC development. Whether you are a rising talent or a seasoned veteran with extensive tape-out experience, this role offers a platform to push the boundaries of Power, Performance, and Area (PPA) optimization. You will work with advanced process nodes and utilize industry-leading EDA tools to solve complex hardware challenges in a collaborative, innovation-driven environment.

We offer a highly competitive compensation package ranging from $15,000 to $20,000 per month, reflecting the critical nature of this role. If you are passionate about hardware innovation and want to advance your career with a leading recruitment partner, we want to hear from you.

Tanggung Jawab

  • Execute full-flow digital IC design, including RTL coding using Verilog or SystemVerilog for complex ASIC/SoC architectures.
  • Lead or support logic synthesis, DFT (Design for Test) insertion, and Static Timing Analysis (STA) to ensure design integrity.
  • Collaborate closely with physical design teams to oversee floorplanning, routing, and GDSII tape-out processes.
  • Develop and implement comprehensive verification plans (UVM/OVM) to ensure functional correctness of designs.
  • Perform power analysis and optimization to meet stringent energy-efficiency requirements for mobile and high-performance computing.
  • Conduct post-silicon bring-up, debugging, and characterization in the lab environment.
  • For Staff levels: Provide technical leadership, mentor junior engineers, and drive architectural decisions for multi-million gate designs.

Kualifikasi

  • Bachelor’s, Master’s, or PhD in Electrical/Electronics Engineering, Computer Engineering, or a related technical discipline.
  • Proven experience in IC Design (3+ years for Senior, 8+ years for Staff) with a track record of successful tape-outs.
  • Deep proficiency in EDA tools from industry leaders such as Cadence (Genus, Innovus), Synopsys (Design Compiler, ICC2), or Mentor Graphics.
  • Strong understanding of CMOS technology, digital logic design, and computer architecture principles.
  • Experience with advanced manufacturing nodes (e.g., 7nm, 5nm, or 3nm) is highly desirable.
  • Excellent analytical and problem-solving skills with the ability to navigate complex technical bottlenecks.
  • Strong communication skills to work effectively within cross-functional global teams.

Keahlian yang Dibutuhkan

IC Design ASIC SoC Verilog SystemVerilog RTL Static Timing Analysis EDA Tools Cadence Synopsys Semiconductor FPGA DFT GDSII

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