Deskripsi Pekerjaan
Are you a talented Design Enablement Engineer looking for your next challenge? Adecco is representing a global leader in semiconductor innovation to find an exceptional MTS Design Enablement professional to join their team in Singaporeās Central Region. This role offers the chance to work on cutting-edge technology nodes and contribute to products that power the world's most advanced electronics.
As an MTS in Design Enablement, you will be instrumental in shaping the design methodology and infrastructure that enables successful tape-outs across multiple projects. You will work closely with R&D, design teams, and foundry partners to define requirements, develop PDKs, and optimize design flows. Your expertise in EDA tools and scripting will drive efficiency and quality in the design process.
Key responsibilities include defining and deploying design enablement strategies, maintaining design collateral, automating workflows, and providing hands-on technical support to designers. You will also have the opportunity to lead initiatives in tool evaluation and methodology enhancement.
Our client offers a highly competitive compensation package, including a monthly salary ranging from $8,000 to $13,000, annual wage supplement (13th month), and variable bonus. Located in the bustling Central Region, youāll have access to excellent amenities and connectivity. This is a full-time permanent position with ample opportunities for career advancement in a supportive environment.
Donāt miss this chance to advance your career in a premier organization. Apply now through Adecco and take the next step in your professional journey.
Tanggung Jawab
- Define, develop, and deploy design enablement methodologies, flows, and tools for advanced technology nodes.
- Create, maintain, and qualify Process Design Kits (PDK) and design automation scripts.
- Collaborate with design teams to understand requirements and provide technical support for tool integration and tape-out.
- Drive continuous improvement in design productivity, quality, and turnaround time through automation and best practices.
- Evaluate and benchmark new EDA tools and methodologies, making recommendations for adoption.
- Participate in cross-functional projects to ensure seamless design flow from RTL to GDSII.
- Document design enablement procedures and provide training to junior engineers.
Kualifikasi
- Bachelorās or Masterās degree in Electrical Engineering, Computer Engineering, or related field.
- Minimum of 5 years of experience in VLSI/ASIC design, design enablement, or physical design.
- Strong proficiency in industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics.
- Hands-on experience with scripting languages (Python, Perl, Tcl) for tool automation and flow development.
- Deep understanding of semiconductor fabrication processes and design rules for advanced nodes (7nm and below).
- Excellent problem-solving skills and ability to work in a fast-paced team environment.
- Strong communication and interpersonal skills with the ability to collaborate across multiple teams.
- Experience with PDK development, standard cell libraries, and design methodology is highly desired.