Deskripsi Pekerjaan
Realtek is seeking a highly skilled Semiconductor SOC Architect to join our dynamic team in Jurong East. In this pivotal role, you will be at the forefront of innovation, defining the next generation of System-on-Chip (SOC) architectures that power cutting-edge communication and multimedia technologies. You will collaborate with cross-functional engineering teams to translate complex requirements into robust, high-performance silicon solutions.
The ideal candidate will have a deep technical background in chip-level architecture, a passion for solving intricate design challenges, and the ability to drive technical excellence from specification to implementation. If you thrive in a fast-paced environment and are eager to shape the future of semiconductor technology, we invite you to apply.
Tanggung Jawab
- Define comprehensive SOC system architectures and technical specifications.
- Develop detailed system test specifications and implementation plans to ensure silicon quality.
- Architect and optimize advanced power management schemes and sequencing protocols.
- Design complex reset and clock distribution networks for high-performance SOCs.
- Collaborate with RTL design, verification, and physical design teams to resolve architectural bottlenecks.
- Perform system-level performance modeling and analysis to meet target power, area, and speed (PPA) goals.
- Lead post-silicon bring-up and system-level debugging activities.
Kualifikasi
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Proven experience in SOC architecture design and system-level integration.
- Strong understanding of power management units (PMU), reset sequences, and clock tree architectures.
- Proficiency in hardware description languages (Verilog/SystemVerilog) and scripting languages (Python/Tcl/Perl).
- Solid knowledge of bus protocols (AXI, AHB) and interconnect architectures.
- Excellent analytical, problem-solving, and communication skills.
- Experience with pre-silicon simulation and post-silicon hardware validation.