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Engineering 🏢 Full Time ⭐️ Terverifikasi

Senior Engineer / Engineer (Thin Film - CMP Process)

Vanguard International Semiconductor Singapore Pte. Ltd.
East Region
Estimasi Gaji
SGD 5.000 – SGD 9.000
Live Update
7 Mei 2026
Batas Akhir
7 Mei 2027

Deskripsi Pekerjaan

Vanguard International Semiconductor (VIS) Singapore is seeking a highly skilled and motivated Senior Engineer or Engineer specializing in Thin Film - CMP (Chemical Mechanical Planarization) Process to join our world-class manufacturing facility in the East Region. As a key member of our engineering team, you will be at the forefront of semiconductor innovation, ensuring the highest standards of process stability and wafer quality.

In this role, you will serve as a technical expert and process owner for CMP operations. You will be responsible for the health of the line, driving continuous improvement initiatives that enhance yield, reduce costs, and improve cycle time. This is an exceptional opportunity for a professional looking to advance their career within a leading specialty IC foundry that values technical excellence and professional growth.

The ideal candidate possesses a deep understanding of planarization techniques and is comfortable working in a fast-paced, high-volume manufacturing environment. You will collaborate closely with equipment engineering, integration, and yield teams to solve complex technical challenges and implement robust manufacturing solutions. Whether you are an experienced Senior Engineer or a mid-career professional looking for your next challenge, VIS offers a dynamic environment where your contributions directly impact the global electronics supply chain.

Tanggung Jawab

  • Act as the primary process owner for CMP (Chemical Mechanical Planarization) within the Thin Film department.
  • Monitor and analyze Statistical Process Control (SPC) charts to ensure process stability and immediate response to deviations.
  • Lead troubleshooting efforts for complex process issues and implement effective Corrective and Preventive Actions (CAPA).
  • Drive yield improvement projects through defect reduction and process optimization strategies.
  • Manage new process qualifications and the introduction of new consumables or slurries to the production line.
  • Collaborate with equipment engineers to optimize tool performance and minimize unscheduled downtime.
  • Provide technical guidance and mentorship to junior engineers and technical staff.

Kualifikasi

  • Bachelor’s or Master’s Degree in Chemical Engineering, Materials Science, Electrical Engineering, or a related technical discipline.
  • Minimum of 2-5 years of hands-on experience in a semiconductor wafer fabrication environment (Fab).
  • Strong technical knowledge of CMP equipment (e.g., Applied Materials Mirra/Reflexion or Ebara).
  • Proven expertise in Design of Experiments (DOE) and data analysis using JMP or similar software.
  • Excellent problem-solving skills with a focus on root cause analysis (RCA).
  • Ability to work effectively in a cross-functional team environment.
  • Strong communication skills and the ability to present technical data to management.

Keahlian yang Dibutuhkan

CMP Chemical Mechanical Planarization Thin Film Semiconductor Manufacturing SPC DOE Yield Improvement Wafer Fabrication Root Cause Analysis JMP

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