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Engineering 🏢 Full Time ⭐️ Terverifikasi

Senior Soft IP Design Engineer

Lattice Semiconductor
Bayan Lepas, Penang, Malaysia
Estimasi Gaji
MYR 10.000 – MYR 15.000
Live Update
25 April 2026
Batas Akhir
25 Apr 2027

Deskripsi Pekerjaan

Lattice Semiconductor is seeking a highly skilled Senior Soft IP Design Engineer to join our innovative team in Penang, Malaysia. As a global leader in low-power, small footprint FPGAs, we offer an exciting opportunity to work on cutting-edge semiconductor technology that powers tomorrow's electronic devices.

In this role, you will be responsible for designing, developing, and validating soft IP components that are integral to our FPGA product portfolio. You will collaborate closely with architecture, verification, and product teams to deliver high-quality IP solutions that meet stringent performance and quality standards.

The ideal candidate will bring expertise in soft IP packaging, example design creation, and testbench development. You will play a crucial role in ensuring the reliability and functionality of our IP offerings while contributing to continuous improvement initiatives.

Lattice Semiconductor offers competitive compensation, career growth opportunities, and a dynamic work environment where your technical expertise will make a significant impact on our product success.

Tanggung Jawab

  • Design and develop soft IP components for Lattice FPGA product families
  • Create comprehensive example designs and verification testbenches for IP validation
  • Perform soft IP packaging to ensure seamless integration with FPGA development tools
  • Collaborate with cross-functional teams including architecture, verification, and product engineering
  • Debug and resolve IP-related technical issues throughout the product development cycle
  • Document IP specifications, user guides, and design references
  • Mentor junior engineers and provide technical guidance on best practices
  • Contribute to continuous improvement of IP development processes and methodologies

Kualifikasi

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related technical field
  • Minimum 5 years of experience in soft IP design and development
  • Proficiency in hardware description languages (Verilog and/or VHDL)
  • Experience with FPGA development tools and EDA software
  • Strong understanding of IP packaging methodologies and standards
  • Familiarity with verification methodologies and testbench development
  • Excellent problem-solving and analytical skills
  • Good communication skills with ability to work effectively in team environments

Keahlian yang Dibutuhkan

Soft IP Design FPGA Verilog VHDL IP Packaging Testbench Development Example Design RTL Design Verification Semiconductor Digital Design

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